Field
Exemplary embodiments relate a method of forming a fine electrode for flat panel display.
Discussion of the Background
Electrode patterns may be disposed on a substrate for a display, a semiconductor device, or the like, and, as display devices develop, the sizes of these electrode patterns have been reduced. One of the reasons is as follows: a storage node (SN) of a cell capacitor of a DRAM memory device is formed so that an opening hole penetrating through a mold layer, which is a sacrificial layer, is formed, and the shape thereof is formed by the formed hole. Therefore, in order to form the capacitor in a limited narrow area, the size of the storage node needs to be more finely implemented.
Further, performance of a thin film transistor (TFT) may be indicated by a cut-off frequency. Also, the narrower a channel space of a transistor channel, the higher the cut-off frequency, such that the TFT has better performance.
Further, as a method of forming a pattern on a substrate, photolithography methods are generally used. When photolithography is used, the widths of the patterns may be determined by the resolution of the exposure equipment used in the process. However, it may be difficult to directly transfer the image of a hole shape to a photoresist due to the resolution limit of the exposure equipment.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the inventive concept, and, therefore, it may contain information that does not form the prior art that is already known to a person of ordinary skill in the art.